/**************************************************************************//**
 * @file     main.c
 * @version  V1.00
 * $Revision: 1 $
 * $Date: 14/07/15 2:52p $
 * @brief    N572 General Purpose I/O Driver Sample Code
 *
 * @note
 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
 *
 ******************************************************************************/
#include <stdio.h>
#include "N572.h"
#include "gpio.h"

void GPAB_IRQHandler(void)
{
		static uint32_t Count=0;
	
    /* To check if PB2 interrupt occurred */
    if (PA->INTSRC & BIT15)
		{
        PA->INTSRC = BIT15;
        printf("PA15 INT occurred. %d\n",Count);
    }
		if (PB->INTSRC & BIT7)
		{
				PB->INTSRC = BIT7;
				printf("PB7 INT occurred. %d\n",Count);
		}
		Count++;
}

void SYS_Init(void)
{
    /*---------------------------------------------------------------------------------------------------------*/
    /* Init System Clock                                                                                       */
    /*---------------------------------------------------------------------------------------------------------*/
    /* Unlock protected registers */
    SYS_UnlockReg();

    // Enable Internal RC
#if( __CHIP_SERIES__ == __N572F065_SERIES__ )	
    CLK_EnableXtalRC(CLK_PWRCTL_OSC24M_EN_Msk);
#endif
#if( __CHIP_SERIES__ == __N572F072_SERIES__ )	
    CLK_EnableXtalRC(CLK_PWRCTL_OSC48M_EN_Msk);
#endif
	
    // Enable External XTL32K
    CLK_EnableXtalRC(CLK_PWRCTL_XTL32K_EN_Msk);

		// Enable PLL1 & PLL2
		CLK_SetPLL1Mode(PLL_NORMAL_MODE);
		CLK_SetPLL2Mode(PLL_NORMAL_MODE);
	
		// Select PLL2 input source and frequence
#if( __CHIP_SERIES__ == __N572F065_SERIES__ )	
		CLK_SetPLL2(PLL2_SRC_PLL1_FOUT, NULL); // 32K -> PLL1(6M) -> PLL2(48M)
#endif
#if( __CHIP_SERIES__ == __N572F072_SERIES__ )	
		CLK_SetPLL2(PLL2_SRC_PLL1_FOUT, PLL2_48M);
#endif

		// Set RAM wait state
		SYS_SET_RAM_WAIT_STATE(SYS_IPRST0_RAMWS_ZERO_WAIT);
	
    // Set flash memory wait state
		SYS_SET_CPU_WAIT_STATE(SYS_IPRST0_CPUWS_1HCLK_WAIT);

		// Procedures to configure the HCLK from internal RC
#if( __CHIP_SERIES__ == __N572F065_SERIES__ )	
	    CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_XTL_32K,CLK_CLKDIV_HCLK(1));
			//CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL1_FOUT,CLK_CLKDIV_HCLK(1));
			//CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL2_FOUT,CLK_CLKDIV_HCLK(1));
			//CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_RC_24M,CLK_CLKDIV_HCLK(1));
#endif
#if( __CHIP_SERIES__ == __N572F072_SERIES__ )	
	    CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_XTL_32K,CLK_CLKDIV_HCLK(1));
			//CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL1_FOUT,CLK_CLKDIV_HCLK(1));
			//CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL2_FOUT,CLK_CLKDIV_HCLK(1));
			//CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_RC_48M,CLK_CLKDIV_HCLK(1));
		#endif
	
    // Update System Core Clock
    // User can use SystemCoreClockUpdate() to calculate SystemCoreClock.
    SystemCoreClockUpdate();

    // Lock protected registers
    SYS_LockReg();

    /*---------------------------------------------------------------------------------------------------------*/
    /* Init I/O Multi-function                                                                                 */
    /*---------------------------------------------------------------------------------------------------------*/
}

/*---------------------------------------------------------------------------------------------------------*/
/* MAIN function                                                                                           */
/*---------------------------------------------------------------------------------------------------------*/
int main (void)
{
    int32_t i32Err;
		uint16_t PB7;
		uint32_t count=0;
	
    /* Lock protected registers */
    if(SYS->REGLCTL == 1) // In end of main function, program issued CPU reset and write-protection will be disabled.
        SYS_LockReg();

		/* Init System, IP clock and multi-function I/O
       In the end of SYS_Init() will issue SYS_LockReg()
       to lock protected register. If user want to write
       protected register, please issue SYS_UnlockReg()
       to unlock protected register if necessary */
    SYS_Init();

    printf("\n\nCPU @ %dHz\n", SystemCoreClock);

    printf("+-------------------------------------+ \n");
    printf("|           GPIO Driver Sample Code   | \n");
    printf("+-------------------------------------+ \n");

    /*-----------------------------------------------------------------------------------------------------*/
    /* GPIO Basic Mode Test --- Use Pin Data Input/Output to control GPIO pin                              */
    /*-----------------------------------------------------------------------------------------------------*/
    printf("  >> Please connect PA.15 and PB.7 first << \n");
    printf("     Press any key to start test by using [Pin Data Input/Output Control] \n\n");
    //getchar();

    /* Configure PA.15 as Output mode and PB.7 as Input mode then close it */
    GPIO_SetMode(PA, BIT15, GPIO_MODE_OUTPUT);
    GPIO_SetMode(PB, BIT7, GPIO_MODE_INPUT);
		
    i32Err = 0;
    printf("  GPIO Output/Input test ...... \n");

    /* Use Pin Data Input/Output Control to pull specified I/O or get I/O pin status */
    GPIO_SET_OUT_DATA(PA, 0x00); // PA15=0
		PB7 = GPIO_GET_IN_DATA(PB) & 0x80;
    if (PB7 != 0) {
        i32Err = 1;
    }

    GPIO_SET_OUT_DATA(PA, 0x8000); // PA15=1
		PB7 = GPIO_GET_IN_DATA(PB) & 0x80;
    if (PB7 != 0x80) {
        i32Err = 1;
    }

    if ( i32Err ) {
        printf("  [FAIL] --- Please make sure PA.15 and PB.7 are connected. \n");
    } else {
        printf("  [OK] \n");
    }

    /* Configure PA.15 and PB.7 to default Quasi-bidirectional mode */
    GPIO_SetMode(PA, BIT15, GPIO_MODE_QUASI);
    GPIO_SetMode(PB, BIT7, GPIO_MODE_QUASI);


    /*-----------------------------------------------------------------------------------------------------*/
    /* GPIO Interrupt Function Test                                                                        */
    /*-----------------------------------------------------------------------------------------------------*/
    printf("\n  PA15, PB7 are used to test interrupt\n");

    /* Configure PA15 as Input mode and enable interrupt by rising edge trigger */
    GPIO_SetMode(PA, BIT15, GPIO_MODE_INPUT);
    GPIO_EnableInt(PA, 15, GPIO_INT_RISING);
    NVIC_EnableIRQ(GPAB_IRQn);

    /*  Configure PB7 as Quasi-bi-direction mode and enable interrupt by both rising and falling edge trigger */
    GPIO_SetMode(PB, BIT7, GPIO_MODE_QUASI);
		GPIO_EnableInt(PB, 7, GPIO_INT_BOTH_EDGE);
		
    NVIC_EnableIRQ(GPAB_IRQn);

    /* Waiting for interrupts */
    while (1)
		{
			GPIO_SET_OUT_DATA(PA, ~((count>>12)&0xf000));
			GPIO_SET_OUT_DATA(PB, ~((count>>12)&0x80));
			count++;
		}
}
