/**************************************************************************//**
 * @file     main.c
 * @version  V1.00
 * $Revision: 1 $
 * $Date: 14/07/15 2:52p $
 * @brief    N572 Watchdog Timer Driver Sample Code
 *
 * @note
 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
 *
 ******************************************************************************/
#include <stdio.h>
#include "N572.h"
#include "gpio.h"

volatile uint32_t u32WDTCount=0;

void WDT_IRQHandler()
{
		if (u32WDTCount<10) WDT_RESET_COUNTER();
		if (u32WDTCount>7) GPIO_SET_OUT_DATA(PB, 0x0FC0);
		u32WDTCount++;
		WDT_CLEAR_TIMEOUT_INT_FLAG();
}

void SYS_Init(void)
{
    /*---------------------------------------------------------------------------------------------------------*/
    /* Init System Clock                                                                                       */
    /*---------------------------------------------------------------------------------------------------------*/
    /* Unlock protected registers */
    SYS_UnlockReg();

    // Enable Internal RC
#if( __CHIP_SERIES__ == __N572F065_SERIES__ )	
    CLK_EnableXtalRC(CLK_PWRCTL_OSC24M_EN_Msk);
#endif
#if( __CHIP_SERIES__ == __N572F072_SERIES__ )	
    CLK_EnableXtalRC(CLK_PWRCTL_OSC48M_EN_Msk);
#endif
	
    // Enable External XTL32K
    CLK_EnableXtalRC(CLK_PWRCTL_XTL32K_EN_Msk);

		// Enable PLL1 & PLL2
		CLK_SetPLL1Mode(PLL_NORMAL_MODE);
		CLK_SetPLL2Mode(PLL_NORMAL_MODE);
	
		// Select PLL2 input source and frequence
#if( __CHIP_SERIES__ == __N572F065_SERIES__ )	
		CLK_SetPLL2(PLL2_SRC_PLL1_FOUT, NULL); // 32K -> PLL1(6M) -> PLL2(48M)
#endif
#if( __CHIP_SERIES__ == __N572F072_SERIES__ )	
		CLK_SetPLL2(PLL2_SRC_PLL1_FOUT, PLL2_48M);
#endif

		// Set RAM wait state
		SYS_SET_RAM_WAIT_STATE(SYS_IPRST0_RAMWS_ZERO_WAIT);
	
    // Set flash memory wait state
		SYS_SET_CPU_WAIT_STATE(SYS_IPRST0_CPUWS_1HCLK_WAIT);

		// Procedures to configure the HCLK from internal RC
#if( __CHIP_SERIES__ == __N572F065_SERIES__ )	
	    //CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_XTL_32K,CLK_CLKDIV_HCLK(1));
			//CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL1_FOUT,CLK_CLKDIV_HCLK(1));
			CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL2_FOUT,CLK_CLKDIV_HCLK(1));
			//CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_RC_24M,CLK_CLKDIV_HCLK(1));
#endif
#if( __CHIP_SERIES__ == __N572F072_SERIES__ )	
	    //CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_XTL_32K,CLK_CLKDIV_HCLK(1));
			//CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL1_FOUT,CLK_CLKDIV_HCLK(1));
			CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL2_FOUT,CLK_CLKDIV_HCLK(1));
			//CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_RC_48M,CLK_CLKDIV_HCLK(1));
		#endif

		/* Enable IP clock */
		CLK_EnableModuleClock(WDT_MODULE);
    
    
		/* Select IP clock source */
    CLK_SetModuleClock(WDT_MODULE,MODULE_NoMsk,MODULE_NoMsk);

    // Update System Core Clock
    // User can use SystemCoreClockUpdate() to calculate SystemCoreClock.
    SystemCoreClockUpdate();

    // Lock protected registers
    SYS_LockReg();

    /*---------------------------------------------------------------------------------------------------------*/
    /* Init I/O Multi-function                                                                                 */
    /*---------------------------------------------------------------------------------------------------------*/
		GPIO_SetMode(PB, BIT6, GPIO_MODE_OUTPUT);
		GPIO_SetMode(PB, BIT7, GPIO_MODE_OUTPUT);
		GPIO_SetMode(PB, BIT8, GPIO_MODE_OUTPUT);
		GPIO_SetMode(PB, BIT9, GPIO_MODE_OUTPUT);
		GPIO_SetMode(PB, BIT10, GPIO_MODE_OUTPUT);
		GPIO_SetMode(PB, BIT11, GPIO_MODE_OUTPUT);
}

/*---------------------------------------------------------------------------------------------------------*/
/* MAIN function                                                                                           */
/*---------------------------------------------------------------------------------------------------------*/
int main (void)
{
    /* Lock protected registers */
    if(SYS->REGLCTL == 1) // In end of main function, program issued CPU reset and write-protection will be disabled.
        SYS_LockReg();

		GPIO_SET_OUT_DATA(PB, ~0x0FC0);

		WDT_Open(WDT_TIMEOUT_2POW12, 1);

    while(1);
}
