#line 1 "..\\..\\..\\..\\Library\\StdDriver\\src\\clk.c"
 








 

#line 1 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572.h"
 









 
#line 1 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"
 









 




















 











 








 




 



 
 
typedef	enum IRQn
{
 
	NonMaskableInt_IRQn		= -14,		 
	HardFault_IRQn			= -13,		 
	SVCall_IRQn				= -5,		 
	PendSV_IRQn				= -2,		 
	SysTick_IRQn			= -1,		 

 
	WDT_IRQn				= 0,
	APU_IRQn				= 1,
	ADC_IRQn				= 2,
	EXINT_IRQn				= 3,
	USBD_IRQn				= 4,
	TMR0_IRQn				= 5,
	TMR1_IRQn				= 6,
	TMR2_IRQn				= 7,
	GPAB_IRQn				= 8,
	SPI0_IRQn				= 9,
	PWM0_IRQn				= 10,
	SPI1_IRQn				= 11,
	TMRF_IRQn				= 12,
	RTC_IRQn				= 13,
	PWRWU_IRQn				= 14
										 
} IRQn_Type;






 

 



   

#line 1 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cm0.h"
 




















 













 












 




 


 

 













#line 89 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cm0.h"


 







#line 114 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cm0.h"

#line 1 "d:\\Keil_v5\\ARM\\ARMCC\\Bin\\..\\include\\stdint.h"
 
 





 









     
#line 27 "d:\\Keil_v5\\ARM\\ARMCC\\Bin\\..\\include\\stdint.h"
     











#line 46 "d:\\Keil_v5\\ARM\\ARMCC\\Bin\\..\\include\\stdint.h"





 

     

     
typedef   signed          char int8_t;
typedef   signed short     int int16_t;
typedef   signed           int int32_t;
typedef   signed       __int64 int64_t;

     
typedef unsigned          char uint8_t;
typedef unsigned short     int uint16_t;
typedef unsigned           int uint32_t;
typedef unsigned       __int64 uint64_t;

     

     
     
typedef   signed          char int_least8_t;
typedef   signed short     int int_least16_t;
typedef   signed           int int_least32_t;
typedef   signed       __int64 int_least64_t;

     
typedef unsigned          char uint_least8_t;
typedef unsigned short     int uint_least16_t;
typedef unsigned           int uint_least32_t;
typedef unsigned       __int64 uint_least64_t;

     

     
typedef   signed           int int_fast8_t;
typedef   signed           int int_fast16_t;
typedef   signed           int int_fast32_t;
typedef   signed       __int64 int_fast64_t;

     
typedef unsigned           int uint_fast8_t;
typedef unsigned           int uint_fast16_t;
typedef unsigned           int uint_fast32_t;
typedef unsigned       __int64 uint_fast64_t;

     




typedef   signed           int intptr_t;
typedef unsigned           int uintptr_t;


     
typedef   signed     long long intmax_t;
typedef unsigned     long long uintmax_t;




     

     





     





     





     

     





     





     





     

     





     





     





     

     






     






     






     

     


     


     


     

     
#line 216 "d:\\Keil_v5\\ARM\\ARMCC\\Bin\\..\\include\\stdint.h"

     



     






     
    
 



#line 241 "d:\\Keil_v5\\ARM\\ARMCC\\Bin\\..\\include\\stdint.h"

     







     










     











#line 305 "d:\\Keil_v5\\ARM\\ARMCC\\Bin\\..\\include\\stdint.h"






 
#line 116 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cm0.h"
#line 1 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cmInstr.h"
 




















 






 


 



 


 









 







 







 






 








 







 







 









 









 
__attribute__((section(".rev16_text"))) static __inline __asm uint32_t __REV16(uint32_t value)
{
  rev16 r0, r0
  bx lr
}








 
__attribute__((section(".revsh_text"))) static __inline __asm int32_t __REVSH(int32_t value)
{
  revsh r0, r0
  bx lr
}









 



#line 268 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cmInstr.h"



#line 619 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cmInstr.h"

   

   

#line 117 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cm0.h"
#line 1 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cmFunc.h"
 




















 






 

 



 


 





 
 






 
static __inline uint32_t __get_CONTROL(void)
{
  register uint32_t __regControl         __asm("control");
  return(__regControl);
}







 
static __inline void __set_CONTROL(uint32_t control)
{
  register uint32_t __regControl         __asm("control");
  __regControl = control;
}







 
static __inline uint32_t __get_IPSR(void)
{
  register uint32_t __regIPSR          __asm("ipsr");
  return(__regIPSR);
}







 
static __inline uint32_t __get_APSR(void)
{
  register uint32_t __regAPSR          __asm("apsr");
  return(__regAPSR);
}







 
static __inline uint32_t __get_xPSR(void)
{
  register uint32_t __regXPSR          __asm("xpsr");
  return(__regXPSR);
}







 
static __inline uint32_t __get_PSP(void)
{
  register uint32_t __regProcessStackPointer  __asm("psp");
  return(__regProcessStackPointer);
}







 
static __inline void __set_PSP(uint32_t topOfProcStack)
{
  register uint32_t __regProcessStackPointer  __asm("psp");
  __regProcessStackPointer = topOfProcStack;
}







 
static __inline uint32_t __get_MSP(void)
{
  register uint32_t __regMainStackPointer     __asm("msp");
  return(__regMainStackPointer);
}







 
static __inline void __set_MSP(uint32_t topOfMainStack)
{
  register uint32_t __regMainStackPointer     __asm("msp");
  __regMainStackPointer = topOfMainStack;
}







 
static __inline uint32_t __get_PRIMASK(void)
{
  register uint32_t __regPriMask         __asm("primask");
  return(__regPriMask);
}







 
static __inline void __set_PRIMASK(uint32_t priMask)
{
  register uint32_t __regPriMask         __asm("primask");
  __regPriMask = (priMask);
}


#line 260 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cmFunc.h"


#line 296 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cmFunc.h"


#line 615 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cmFunc.h"

 

   

#line 118 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cm0.h"








 
#line 143 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cm0.h"

 






 
#line 159 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cm0.h"

 










 


 





 


 
typedef union
{
  struct
  {

    uint32_t _reserved0:27;               





    uint32_t Q:1;                         
    uint32_t V:1;                         
    uint32_t C:1;                         
    uint32_t Z:1;                         
    uint32_t N:1;                         
  } b;                                    
  uint32_t w;                             
} APSR_Type;



 
typedef union
{
  struct
  {
    uint32_t ISR:9;                       
    uint32_t _reserved0:23;               
  } b;                                    
  uint32_t w;                             
} IPSR_Type;



 
typedef union
{
  struct
  {
    uint32_t ISR:9;                       

    uint32_t _reserved0:15;               





    uint32_t T:1;                         
    uint32_t IT:2;                        
    uint32_t Q:1;                         
    uint32_t V:1;                         
    uint32_t C:1;                         
    uint32_t Z:1;                         
    uint32_t N:1;                         
  } b;                                    
  uint32_t w;                             
} xPSR_Type;



 
typedef union
{
  struct
  {
    uint32_t nPRIV:1;                     
    uint32_t SPSEL:1;                     
    uint32_t FPCA:1;                      
    uint32_t _reserved0:29;               
  } b;                                    
  uint32_t w;                             
} CONTROL_Type;

 






 


 
typedef struct
{
  volatile uint32_t ISER[1];                  
       uint32_t RESERVED0[31];
  volatile uint32_t ICER[1];                  
       uint32_t RSERVED1[31];
  volatile uint32_t ISPR[1];                  
       uint32_t RESERVED2[31];
  volatile uint32_t ICPR[1];                  
       uint32_t RESERVED3[31];
       uint32_t RESERVED4[64];
  volatile uint32_t IP[8];                    
}  NVIC_Type;

 






 


 
typedef struct
{
  volatile const  uint32_t CPUID;                    
  volatile uint32_t ICSR;                     
       uint32_t RESERVED0;
  volatile uint32_t AIRCR;                    
  volatile uint32_t SCR;                      
  volatile uint32_t CCR;                      
       uint32_t RESERVED1;
  volatile uint32_t SHP[2];                   
  volatile uint32_t SHCSR;                    
} SCB_Type;

 















 



























 















 









 






 



 






 


 
typedef struct
{
  volatile uint32_t CTRL;                     
  volatile uint32_t LOAD;                     
  volatile uint32_t VAL;                      
  volatile const  uint32_t CALIB;                    
} SysTick_Type;

 












 



 



 









 








 
 






 

 










 









 

 



 




 

 
 










 
static __inline void NVIC_EnableIRQ(IRQn_Type IRQn)
{
  ((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
}







 
static __inline void NVIC_DisableIRQ(IRQn_Type IRQn)
{
  ((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
}











 
static __inline uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
  return((uint32_t) ((((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
}







 
static __inline void NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
  ((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
}







 
static __inline void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
  ((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->ICPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F));  
}










 
static __inline void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
  if(IRQn < 0) {
    ((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->SHP[( ((((uint32_t)(IRQn) & 0x0F)-8) >> 2) )] = (((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->SHP[( ((((uint32_t)(IRQn) & 0x0F)-8) >> 2) )] & ~(0xFF << ( (((uint32_t)(IRQn) ) & 0x03) * 8 ))) |
        (((priority << (8 - 2)) & 0xFF) << ( (((uint32_t)(IRQn) ) & 0x03) * 8 )); }
  else {
    ((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->IP[( ((uint32_t)(IRQn) >> 2) )] = (((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->IP[( ((uint32_t)(IRQn) >> 2) )] & ~(0xFF << ( (((uint32_t)(IRQn) ) & 0x03) * 8 ))) |
        (((priority << (8 - 2)) & 0xFF) << ( (((uint32_t)(IRQn) ) & 0x03) * 8 )); }
}












 
static __inline uint32_t NVIC_GetPriority(IRQn_Type IRQn)
{

  if(IRQn < 0) {
    return((uint32_t)((((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->SHP[( ((((uint32_t)(IRQn) & 0x0F)-8) >> 2) )] >> ( (((uint32_t)(IRQn) ) & 0x03) * 8 ) ) >> (8 - 2)));  }  
  else {
    return((uint32_t)((((NVIC_Type *) ((0xE000E000UL) + 0x0100UL) )->IP[ ( ((uint32_t)(IRQn) >> 2) )] >> ( (((uint32_t)(IRQn) ) & 0x03) * 8 ) ) >> (8 - 2)));  }  
}





 
static __inline void NVIC_SystemReset(void)
{
  __dsb(0xF);                                                     
 
  ((SCB_Type *) ((0xE000E000UL) + 0x0D00UL) )->AIRCR  = ((0x5FA << 16)      |
                 (1UL << 2));
  __dsb(0xF);                                                      
  while(1);                                                     
}

 



 




 

















 
static __inline uint32_t SysTick_Config(uint32_t ticks)
{
  if (ticks > (0xFFFFFFUL << 0))  return (1);             

  ((SysTick_Type *) ((0xE000E000UL) + 0x0010UL) )->LOAD  = (ticks & (0xFFFFFFUL << 0)) - 1;       
  NVIC_SetPriority (SysTick_IRQn, (1<<2) - 1);   
  ((SysTick_Type *) ((0xE000E000UL) + 0x0010UL) )->VAL   = 0;                                           
  ((SysTick_Type *) ((0xE000E000UL) + 0x0010UL) )->CTRL  = (1UL << 2) |
                   (1UL << 1)   |
                   (1UL << 0);                     
  return (0);                                                   
}



 








   

#line 106 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"
#line 1 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\system_N572F065.h"
 





















 












 







extern uint32_t SystemCoreClock;      
extern uint32_t CyclesPerUs;          
extern uint32_t gau32HiRCSrcTbl[];    









 
extern void SystemInit (void);









 
extern void SystemCoreClockUpdate (void);





#line 107 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"

#line 115 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"
#pragma anon_unions
#line 136 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"


 
 
 





 


 



 
 
typedef struct
{


    




















 
    volatile const  uint32_t DAT[8];                  

    









































 
    volatile uint32_t CTL;                   

    
























































 
    volatile uint32_t CHSEQ;                 

    


































 
    volatile uint32_t CMP[2];                  

    



































 
    volatile uint32_t STATUS;                

    


















 
    volatile uint32_t CAL;                   
         uint32_t RESERVE0[1];


    
























 
    volatile uint32_t PGCTL;                 

} ADC_T;




 



















































































































   
   


 



 
 
typedef struct
{


    





































 
    volatile uint32_t CTL;                   

    















 
    volatile uint32_t VM;                    
         uint32_t RESERVE0[1];


    









 
    volatile uint32_t CH1DAT;               

    









 
    volatile uint32_t CH0DAT[8];               
} APU_T;




 






























   
   


 



 
 
typedef struct
{


    













































































 
    volatile uint32_t PWRCTL;                

    









 
    volatile uint32_t AHBCLK;                

    
















































 
    volatile uint32_t APBCLK;                
         uint32_t RESERVE0[1];


    



















 
    volatile uint32_t CLKSEL0;               

    

















































 
    volatile uint32_t CLKSEL1;               

    











 
    volatile uint32_t CLKDIV;                
         uint32_t RESERVE1[1];


    






 
         uint32_t PLLCON;                

} CLK_T;




 










































































































   
   

 



 
 
typedef struct
{


    







































 
    volatile uint32_t ISPCTL;                

    










 
    volatile uint32_t ISPADDR;               

    









 
    volatile uint32_t ISPDAT;                

    















 
    volatile uint32_t ISPCMD;                

    











 
    volatile uint32_t ISPTRG;                
         uint32_t RESERVE0[1];


    






 
         uint32_t FAT;                   

} FMC_T;




 































   
   


 



 
 
typedef struct
{


    






































































































 
    volatile uint32_t MODE;               

    






















































 
    volatile uint32_t DINOFF;             

    










 
    volatile uint32_t DOUT;               

    











 
    volatile uint32_t DATMSK;             

    









 
    volatile const  uint32_t PIN;                
         uint32_t RESERVE0[1];


    













 
    volatile uint32_t INTTYPE;            

    






































































































































































































































































 
    volatile uint32_t INTEN;              

    













 
    volatile uint32_t INTSRC;
} GPIO_T;




 































































































































































































































































































































































































































   
   


 



 
 
typedef struct
{


    
















 
    volatile uint32_t CLKPSC;                

    













 
    volatile uint32_t CLKDIV;                

    





















 
    volatile uint32_t CTL;                   

    









 
    volatile uint32_t PERIOD;                

    














 
    volatile uint32_t CMPDAT0;               

    








 
    volatile const  uint32_t CNT;                   
         uint32_t RESERVE0[1];


    














 
    volatile uint32_t CMPDAT1;               
         uint32_t RESERVE1[2];


    














 
    volatile uint32_t CMPDAT2;               
         uint32_t RESERVE2[2];


    














 
    volatile uint32_t CMPDAT3;               
         uint32_t RESERVE3[2];


    









 
    volatile uint32_t INTEN;                 

    








 
    volatile uint32_t INTSTS;                
         uint32_t RESERVE4[2];


    






























 
    volatile uint32_t CAPCTL;                
         uint32_t RESERVE5[1];


    








 
    volatile const  uint32_t RCAPDAT;               

    








 
    volatile const  uint32_t FCAPDAT;               
         uint32_t RESERVE6[7];


    

























 
    volatile uint32_t PCEN;                  

} PWM_T;




 






























































































   
   


 



 
 
typedef struct
{


    
























 
    volatile uint32_t CTL;                   

} RTC_T;




 













   
   


 



 
 
typedef struct
{


    






















































 
    volatile uint32_t CTL;                   

    









 
    volatile uint32_t CLKDIV;                

    























 
    volatile uint32_t SSCTL;                 
         uint32_t RESERVE0[1];


    












 
    volatile const  uint32_t RX0;                   

    












 
    volatile const  uint32_t RX1;                   
         uint32_t RESERVE1[2];


    












 
    volatile  uint32_t TX0;                   

    












 
    volatile  uint32_t TX1;                   

} SPI_T;




 


























































   
   


 



 
 
typedef struct
{


    








 
    volatile const  uint32_t PDID;                  

    




































 
    volatile uint32_t RSTSTS;                

    






















 
    volatile uint32_t IPRST0;                

    







































 
    volatile uint32_t IPRST1;                
         uint32_t RESERVE0[2];


    























 
    volatile uint32_t BODCTL;                

    











 
    volatile uint32_t PORCTL;                
         uint32_t RESERVE1[4];


    








































 
    volatile uint32_t GPA_MFP;               

    


































 
    volatile uint32_t GPB_MFP;               
         uint32_t RESERVE2[50];


    


























 
    volatile  uint32_t REGLCTL;               

} SYS_T;




 





















































































































































































   
   


 



 
 
typedef struct
{


    


































 
    volatile uint32_t CTL;                   

    











 
    volatile uint32_t CMP;                   

    












 
    volatile  uint32_t INTSTS;                

    








 
    volatile const  uint32_t CNT;
} TMR_T;

 
typedef struct
{
    














 
    volatile uint32_t INTSTS;
} TMRF_T;
 
typedef struct
{
    












 
         uint32_t CTL;
} TMRIR_T;




 




































































































   
   


 



 
 
typedef struct
{


    
























 
    volatile uint32_t INTEN;                 

    










































 
    volatile uint32_t INTSTS;                

    







 
    volatile uint32_t FADDR;                 

    

































































 
    volatile const  uint32_t EPSTS;                 

    








































 
    volatile uint32_t ATTR;                  

    










 
    volatile const  uint32_t VBUSDET;               

    











 
    volatile uint32_t STBUFSEG;              
         uint32_t RESERVE0[1];


    











 
    volatile uint32_t BUFSEG0;               

    
















 
    volatile uint32_t MXPLD0;                

    

























 
    volatile uint32_t CFG0;                  

    















 
    volatile uint32_t CFGP0;                 

    











 
    volatile uint32_t BUFSEG1;               

    
















 
    volatile uint32_t MXPLD1;                

    

























 
    volatile uint32_t CFG1;                  

    















 
    volatile uint32_t CFGP1;                 

    











 
    volatile uint32_t BUFSEG2;               

    
















 
    volatile uint32_t MXPLD2;                

    

























 
    volatile uint32_t CFG2;                  

    















 
    volatile uint32_t CFGP2;                 

    











 
    volatile uint32_t BUFSEG3;               

    
















 
    volatile uint32_t MXPLD3;                

    

























 
    volatile uint32_t CFG3;                  

    















 
    volatile uint32_t CFGP3;                 

    











 
    volatile uint32_t BUFSEG4;               

    
















 
    volatile uint32_t MXPLD4;                

    

























 
    volatile uint32_t CFG4;                  

    















 
    volatile uint32_t CFGP4;                 

    











 
    volatile uint32_t BUFSEG5;               

    
















 
    volatile uint32_t MXPLD5;                

    

























 
    volatile uint32_t CFG5;                  

    















 
    volatile uint32_t CFGP5;                 
         uint32_t RESERVE1[4];


    










 
    volatile uint32_t SE0;                   
         uint32_t RESERVE2[3];


    





















 
    volatile uint32_t BIST;                  

} USBD_T;




 




































































































































































































































































































   
   


 



 
 
typedef struct
{


    


























































 
    volatile uint32_t CTL;                   

} WDT_T;




 




























   
   


   

 
 
 



 
 





 
 
 
 

#line 4816 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"

#line 4823 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"

   
 
 
 


 
#line 4849 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"

   











 

typedef volatile unsigned char  vu8;        
typedef volatile unsigned short vu16;       
typedef volatile unsigned long  vu32;       





 







 







 








 







 








 







 







 






 








 







 








 







 







 






 


   







 













 
#line 5044 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"

 










   

   



 
 
 
#line 1 "..\\..\\..\\..\\Library\\StdDriver\\inc\\sys.h"
 








 
 










 



 



 

 
 
 
#line 43 "..\\..\\..\\..\\Library\\StdDriver\\inc\\sys.h"
 	
 
 
 
#line 62 "..\\..\\..\\..\\Library\\StdDriver\\inc\\sys.h"

 
 
 






 
 
 



 
 
 


#line 99 "..\\..\\..\\..\\Library\\StdDriver\\inc\\sys.h"


#line 117 "..\\..\\..\\..\\Library\\StdDriver\\inc\\sys.h"

 
 
 






 




















































































































   



 

#line 258 "..\\..\\..\\..\\Library\\StdDriver\\inc\\sys.h"
























void SYS_EnableBOD(uint32_t u32BODLevel);
void SYS_DisableBOD(void);
void SYS_ClearResetSrc(uint32_t u32Src);
uint32_t SYS_GetResetSrc(void);
uint32_t SYS_IsRegLocked(void);
void SYS_LockReg(void);
void SYS_Lock(uint8_t u8Lock);
void SYS_UnlockReg(void);
uint8_t SYS_Unlock(void);
uint32_t SYS_ReadPDID(void);
void SYS_ResetChip(void);
void SYS_ResetCPU(void);
void SYS_ResetModule(uint32_t u32ModuleIndex);
void SYS_SetRamWaitSate(uint32_t u32RamWaitState);
void SYS_SetCpuWaiState(uint32_t u32CpuWaitState);
void SYS_SetRamCpuWaitState(uint32_t u32RamWaitState, uint32_t u32CpuWaitState);
void SYS_DisableLVR(void);
void SYS_EnableLVR(void);
void SYS_DisablePOR(void);
void SYS_EnablePOR(void);

   

   

   








 
#line 5066 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"
#line 1 "..\\..\\..\\..\\Library\\StdDriver\\inc\\clk.h"
 








 










 



 



 













































#line 81 "..\\..\\..\\..\\Library\\StdDriver\\inc\\clk.h"







#line 101 "..\\..\\..\\..\\Library\\StdDriver\\inc\\clk.h"
	


#line 179 "..\\..\\..\\..\\Library\\StdDriver\\inc\\clk.h"










#line 198 "..\\..\\..\\..\\Library\\StdDriver\\inc\\clk.h"

   




 










 


void CLK_SetPLL1Mode(uint32_t u32PllMode);
void CLK_SetPLL2Mode(uint32_t u32PllMode);
void CLK_EnablePowerDownMode(void);
void CLK_DisablePowerDownMode(void);
void CLK_ClearWakeUpStatusFlag(void);
void CLK_EnableWakeUpInterrupt(void);
void CLK_DisableWakeUpInterrupt(void);
void CLK_EnableWakeUpDelay(void);
void CLK_DisableWakeUpDelay(void);
void CLK_EnableLDO30(void);
void CLK_DisableLDO30(void);
uint32_t CLK_GetHCLKFreq(void);
void CLK_SetPLL2(uint32_t u32PllClkSrc, uint32_t u32PllFreq);
uint32_t CLK_GetPLL2ClockFreq(void);
void CLK_EnableXtalRC(uint32_t u32ClkMask);
void CLK_DisableXtalRC(uint32_t u32ClkMask);
void CLK_SetHCLK(uint32_t u32ClkSrc, uint32_t u32ClkDiv);
void CLK_EnableModuleClock(uint32_t u32ModuleIdx);
void CLK_DisableModuleClock(uint32_t u32ModuleIdx);
void CLK_SetModuleClock(uint32_t u32ModuleIdx, uint32_t u32ClkSrc, uint32_t u32ClkDiv);






   

   

   







 
#line 5067 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"
#line 1 "..\\..\\..\\..\\Library\\StdDriver\\inc\\gpio.h"
 








 










 



 




 
	


 
 
 





 
 
 






 
 
 



   



 










 











 











 











 











 












 










 











 










 










 



void GPIO_SetMode(GPIO_T *gpio, uint32_t u32PinMask, uint32_t u32Mode);
void GPIO_EnableInt(GPIO_T *gpio, uint32_t u32Pin, uint32_t u32IntAttribs);
void GPIO_DisableInt(GPIO_T *gpio, uint32_t u32Pin);

   

   

   








 
#line 5068 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"
#line 1 "..\\..\\..\\..\\Library\\StdDriver\\inc\\timer.h"
 








 










 



 



 





   




 










 












 












 









 
static __inline void TIMER_Start(TMR_T *timer)
{
    timer->CTL |= (0x1ul << (30));
}








 
static __inline void TIMER_Stop(TMR_T *timer)
{
    timer->CTL &= ~(0x1ul << (30));
}









 
static __inline void TIMER_EnableInt(void *timer)
{
		if (timer==((TMRF_T *) ((( uint32_t)0x40000000) + 0x10030))) ((TMRF_T *)timer)->INTSTS |= (0x1ul << (1));
    else ((TMR_T *)timer)->CTL |= (0x1ul << (29));
}









 
static __inline void TIMER_DisableInt(void *timer)
{
		if (timer==((TMRF_T *) ((( uint32_t)0x40000000) + 0x10030))) ((TMRF_T *)timer)->INTSTS &= ~(0x1ul << (1));
		else ((TMR_T *)timer)->CTL &= ~(0x1ul << (29));
}











 
static __inline uint32_t TIMER_GetIntFlag(void *timer)
{
		if (timer==((TMRF_T *) ((( uint32_t)0x40000000) + 0x10030))) return(((TMRF_T *)timer)->INTSTS & (0x1ul << (0)) ? 1 : 0);
    else return(((TMR_T *)timer)->INTSTS & (0x1ul << (0)) ? 1 : 0);
}









 
static __inline void TIMER_ClearIntFlag(void *timer)
{
    if (timer==((TMRF_T *) ((( uint32_t)0x40000000) + 0x10030))) ((TMRF_T *)timer)->INTSTS |= (0x1ul << (0));
		else ((TMR_T *)timer)->INTSTS |= (0x1ul << (0));
}








 
static __inline uint32_t TIMER_GetCounter(TMR_T *timer)
{
    return timer->CNT;
}






 
static __inline void TIMER_IRCarrierOutputEnable(TMRIR_T *timer)
{
		timer->CTL |= (0x1ul << (0));
}






 
static __inline void TIMER_IRCarrierOutputDisable(TMRIR_T *timer)
{
		timer->CTL &= ~(0x1ul << (0));
}

uint32_t TIMER_Open(TMR_T *timer, uint32_t u32Mode, uint32_t u32Freq);
void     TIMER_Close(TMR_T *timer);
void     TIMER_Delay(TMR_T *timer, uint32_t u32Usec);
uint32_t TIMER_GetModuleClock(TMR_T *timer);


   

   

   







 
#line 5069 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"
#line 1 "..\\..\\..\\..\\Library\\StdDriver\\inc\\pwm.h"
 








 











 



 



 
#line 42 "..\\..\\..\\..\\Library\\StdDriver\\inc\\pwm.h"
 
 
 






   




 







 








 







 










 














 




uint32_t PWM_ConfigCaptureChannel(PWM_T *pwm,uint32_t u32UnitTimeNsec,uint32_t u32CaptureEdge);
uint32_t PWM_ConfigOutputChannel(PWM_T *pwm,uint32_t u32Frequency,uint32_t u32DutyCycle0, uint32_t u32DutyCycle1, uint32_t u32DutyCycle2, uint32_t u32DutyCycle3);
void PWM_SetCNR(PWM_T *pwm,uint16_t u16CNR);
void PWM_SetCMR(PWM_T *pwm,uint32_t u32ChannelNum,uint16_t u16CMR);
void PWM_Start(PWM_T *pwm);
void PWM_Stop(PWM_T *pwm);
void PWM_EnableCapture(PWM_T *pwm);
void PWM_DisableCapture(PWM_T *pwm);
void PWM_EnableOutput(PWM_T *pwm, uint32_t u32Channel);
void PWM_DisableOutput(PWM_T *pwm, uint32_t u32Channel);
void PWM_EnableDeadZone(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Duration);
void PWM_DisableDeadZone(PWM_T *pwm, uint32_t u32ChannelNum);
void PWM_EnableCaptureInt(PWM_T *pwm, uint32_t u32Edge);
void PWM_DisableCaptureInt(PWM_T *pwm, uint32_t u32Edge);
void PWM_ClearCaptureIntFlag(PWM_T *pwm, uint32_t u32Edge);
uint32_t PWM_GetCaptureIntFlag(PWM_T *pwm);
void PWM_EnableInt(PWM_T *pwm);
void PWM_DisableInt(PWM_T *pwm);
void PWM_ClearIntFlag(PWM_T *pwm);
uint32_t PWM_GetIntFlag(PWM_T *pwm);

   

   

   







 
#line 5070 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"
#line 1 "..\\..\\..\\..\\Library\\StdDriver\\inc\\fmc.h"
 









 










 



 




 


 
 
 






 
 
 






 
 
 
#line 63 "..\\..\\..\\..\\Library\\StdDriver\\inc\\fmc.h"

 
 
 
#line 75 "..\\..\\..\\..\\Library\\StdDriver\\inc\\fmc.h"

   




 

 
 
 



 
 
 

void FMC_EnableWrite (void);
void FMC_DisableWrite (void);
void FMC_Open(void);
void FMC_Close(void);
void FMC_SetPageEraseTime(uint32_t u32PageEraseTime);
void FMC_SetProgramTime(uint32_t u32ProgramTime);
int32_t FMC_Erase(uint32_t u32PageAddr);
void FMC_Write(uint32_t u32Addr, uint32_t u32Data);
int32_t FMC_WriteConfig(uint32_t *u32Config);
uint32_t FMC_Read(uint32_t u32Addr);
uint32_t FMC_ReadCID(void);
uint32_t FMC_ReadDID(void);
void FMC_ReadConfig(uint32_t *u32Config);
void FMC_EnsableCfgUpdate(void);
void FMC_DisableCfgUpdate(void);


   

   

   







 
#line 5071 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"
#line 1 "..\\..\\..\\..\\Library\\StdDriver\\inc\\wdt.h"
 








 












 



 




 
	
#line 42 "..\\..\\..\\..\\Library\\StdDriver\\inc\\wdt.h"

   




 





 






 






 








 








 







 


void WDT_EnableInt(void);
void WDT_DisableInt(void);
void WDT_EnableWakeUp(void);
void WDT_DisableWakeUp(void);
void WDT_Open( uint32_t u32TimeoutInterval, uint32_t u32EnableReset );
void WDT_Close(void);
void WDT_ResetCounter(void);
void WDT_ClearTimeOutIntFlag(void);
void WDT_ClearTimeOutWakeupFlag(void);
void WDT_ClearResetFlag(void);

   

   

   







 
#line 5072 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"
#line 1 "..\\..\\..\\..\\Library\\StdDriver\\inc\\rtc.h"
 








 












 



 




 






   



 






void RTC_Open(uint32_t u32TimerInterval);
void RTC_Close(void);
void RTC_EnableInt(void);
void RTC_DisableInt(void);
void RTC_SetTimerInterval(uint32_t u32TimerInterval);


   


   

   









 
#line 5073 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"
#line 1 "..\\..\\..\\..\\Library\\StdDriver\\inc\\spi.h"
 








 










 



 



 





















   



 






 







 







 








 








 








 








 








 








 









 








 








 









 








 









 







 







 







 













 







 


void     SPI_Close(SPI_T *spi);
void     SPI_EnableAutoSS(SPI_T *spi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel);
uint32_t SPI_SetBusClock(SPI_T *spi, uint32_t u32BusClock);
uint32_t SPI_GetBusClock(SPI_T *spi);


uint32_t SPI_Open(SPI_T *spi, uint32_t u32SPIMode, uint32_t u32BusClock);








   

   

   







 
#line 5074 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"
#line 1 "..\\..\\..\\..\\Library\\StdDriver\\inc\\apu.h"
 









 










 



 




 




#line 44 "..\\..\\..\\..\\Library\\StdDriver\\inc\\apu.h"

   




 





 






 






 






 









 






 






 






 






 















 






 










 







 















 






 









 






 


void APU_Open(APU_T *apu); 
void APU_Close(APU_T *apu);
int32_t APU_SetVolGaindB(APU_T *apu, int32_t i32GainIndB);
int32_t APU_GetVolGaindB(APU_T *apu);
uint32_t APU_SetSampleRate(APU_T *apu, uint32_t u32SampleRate);
uint32_t APU_GetSampleRate(APU_T *apu);

   

   

   







 

#line 5075 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"
#line 1 "..\\..\\..\\..\\Library\\StdDriver\\inc\\adc.h"
 









 










 



 




   

#line 46 "..\\..\\..\\..\\Library\\StdDriver\\inc\\adc.h"






























   




 






 











 











 











 










 










 







 







 
















 
#line 189 "..\\..\\..\\..\\Library\\StdDriver\\inc\\adc.h"





 
















 
#line 221 "..\\..\\..\\..\\Library\\StdDriver\\inc\\adc.h"





 





















 
#line 265 "..\\..\\..\\..\\Library\\StdDriver\\inc\\adc.h"






 







 










 











 








 








 







 












 







 


void ADC_Open(ADC_T *adc);
void ADC_Close(ADC_T *adc);
void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask);
void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask);
void ADC_EnableRegulator(ADC_T *adc);
void ADC_DisableRegulator(ADC_T *adc);
void ADC_SetRegulatorRC(ADC_T *adc, uint32_t u32ACC_R, uint32_t u32WAKE_R);
void ADC_GetRegulatorRC(ADC_T *adc,	uint32_t *p32ACC_R, uint32_t 	*pu32WAKE_R);
int32_t ADC_SetPGAGain1dB(ADC_T *adc, int32_t i32PGAGain1IndB);
int32_t ADC_SetPGAGain2dB(ADC_T *adc, int32_t i32PGAGain2IndB);
int32_t ADC_GetPGAGain1dB(ADC_T *adc);
int32_t ADC_GetPGAGain2dB(ADC_T *adc);
void ADC_AnalysisCalibration(ADC_T *adc);

   

   

   







 
#line 5076 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"

#line 1 "..\\..\\..\\..\\Library\\StdDriver\\inc\\usbd.h"
 









 
 






 



 



 

typedef struct s_usbd_info
{
    uint8_t *gu8DevDesc;             
    uint8_t *gu8ConfigDesc;          
    uint8_t *gu8StrLangDesc;         
    uint8_t *gu8StrVendorDesc;       
    uint8_t *gu8StrProductDesc;      
    uint8_t *gu8HidReportDesc;       

} S_USBD_INFO_T;

extern S_USBD_INFO_T gsInfo;

   



 




#line 57 "..\\..\\..\\..\\Library\\StdDriver\\inc\\usbd.h"

 




 
#line 75 "..\\..\\..\\..\\Library\\StdDriver\\inc\\usbd.h"

 
#line 84 "..\\..\\..\\..\\Library\\StdDriver\\inc\\usbd.h"

 



 
#line 96 "..\\..\\..\\..\\Library\\StdDriver\\inc\\usbd.h"

 







 



 
 
 














#line 137 "..\\..\\..\\..\\Library\\StdDriver\\inc\\usbd.h"






















    





   



 




 





 





 






 





 





 







 






 











 






 










 






 










 







 







 








 








 








 







 








 








 







 









 
static __inline void USBD_MemCopy(uint8_t *dest, uint8_t *src, int32_t size)
{
    while(size--) *dest++ = *src++;
}






 
static __inline void USBD_SetStall(uint8_t ep)
{
	
    uint32_t u32i;

    for( u32i=0; u32i<(6); u32i++)
    {
        if( ( (*((volatile uint32_t *)((uint32_t)&(((USBD_T*) ((( uint32_t)0x40000000) + 0x60000))->CFG0)+(u32i<<4)))) & 0xf ) == ep )
		{
            *((volatile uint32_t *)((uint32_t)&(((USBD_T*) ((( uint32_t)0x40000000) + 0x60000))->CFGP0)+(u32i<<4))) |= (0x1ul << (1));
            break;
        }
    }
}






 
static __inline void USBD_ClearStall(uint8_t ep)
{
	
    uint32_t u32i;

    for( u32i=0; u32i<(6); u32i++)
    {
        if( ( (*((volatile uint32_t *)((uint32_t)&(((USBD_T*) ((( uint32_t)0x40000000) + 0x60000))->CFG0)+(u32i<<4)))) & 0xf ) == ep )     
        {
            *((volatile uint32_t *)((uint32_t)&(((USBD_T*) ((( uint32_t)0x40000000) + 0x60000))->CFGP0)+(u32i<<4))) &= ~(0x1ul << (1)); 
            break;
        }
    }
}







 
static __inline uint32_t USBD_GetStall(uint8_t ep)
{
	
    uint32_t u32i;

    for( u32i=0; u32i<(6); u32i++)
    {
        if( ( (*((volatile uint32_t *)((uint32_t)&(((USBD_T*) ((( uint32_t)0x40000000) + 0x60000))->CFG0)+(u32i<<4)))) & 0xf ) == ep )     
        {
			return ((*((volatile uint32_t *)((uint32_t)&(((USBD_T*) ((( uint32_t)0x40000000) + 0x60000))->CFGP0)+(u32i<<4))))&(0x1ul << (1)));
        }
    }
    return 0;
}


typedef void (*CLASS_REQ)(void);             
typedef void (*SET_INTERFACE_REQ)(void);     

 
void USBD_Open(S_USBD_INFO_T *param, CLASS_REQ pfnClassReq, SET_INTERFACE_REQ pfnSetInterface);
void USBD_Start(void);
void USBD_GetSetupPacket(uint8_t *buf);
void USBD_ProcessSetupPacket(void);
void USBD_StandardRequest(void);
void USBD_PrepareCtrlIn(uint8_t *pu8Buf, uint32_t u32Size);
void USBD_CtrlIn(void);
void USBD_PrepareCtrlOut(uint8_t *pu8Buf, uint32_t u32Size);
void USBD_CtrlOut(void);
void USBD_SwReset(void);

   

   

   




 
#line 5078 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572F065.h"

#line 14 "..\\..\\..\\..\\Library\\Device\\Nuvoton\\N572\\Include\\N572.h"
#line 13 "..\\..\\..\\..\\Library\\StdDriver\\src\\clk.c"


 



 



 






 
void CLK_SetPLL1Mode(uint32_t u32PllMode)
{
	 
	u32PllMode = u32PllMode<<(1);
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PLLCON = (((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PLLCON & (~(0x1ul << (1)))) | u32PllMode;
}






 
void CLK_SetPLL2Mode(uint32_t u32PllMode)
{
	 
	u32PllMode = u32PllMode<<(0);
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PLLCON = (((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PLLCON & (~(0x1ul << (0)))) | u32PllMode;
}



 
void CLK_EnablePowerDownMode(void)
{
	 
	uint8_t u8Lock;
	
	u8Lock = SYS_Unlock();
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL = (((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL & (~(0x1ul << (8)))) | (0x1ul << (8));
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL = (((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL & (~(0x1ul << (7)))) | (0x1ul << (7));
	SYS_Lock(u8Lock);
}



 
void CLK_DisablePowerDownMode(void)
{
	 
	uint8_t u8Lock;
	
	u8Lock = SYS_Unlock();
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL = ((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL & (~(0x1ul << (8)));
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL = ((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL & (~(0x1ul << (7)));
	SYS_Lock(u8Lock);
}



 
void CLK_ClearWakeUpStatusFlag(void)
{
	 
	uint8_t u8Lock;
	
	u8Lock = SYS_Unlock();
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL = (((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL & (~(0x1ul << (6)))) | (0x1ul << (6));
	SYS_Lock(u8Lock);
}



 
void CLK_EnableWakeUpInterrupt(void)
{
	 
	uint8_t u8Lock;
	
	u8Lock = SYS_Unlock();
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL = (((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL & (~(0x1ul << (5)))) | (0x1ul << (5));
	SYS_Lock(u8Lock);
}



 
void CLK_DisableWakeUpInterrupt(void)
{
	 
	uint8_t u8Lock;
	
	u8Lock = SYS_Unlock();
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL = ((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL & (~(0x1ul << (5)));
	SYS_Lock(u8Lock);
}



 
void CLK_EnableWakeUpDelay(void)
{
	 
	uint8_t u8Lock;
	
	u8Lock = SYS_Unlock();
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL = (((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL & (~(0x1ul << (4)))) | (0x1ul << (4));
	SYS_Lock(u8Lock);
}



 
void CLK_DisableWakeUpDelay(void)
{
	 
	uint8_t u8Lock;
	
	u8Lock = SYS_Unlock();
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL = ((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL & (~(0x1ul << (4)));
	SYS_Lock(u8Lock);
}



 
void CLK_EnableLDO30(void)
{
	 
	uint8_t u8Lock;
	
	u8Lock = SYS_Unlock();
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL = ((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL & (~(0x1ul << (3)));
	SYS_Lock(u8Lock);
}



 
void CLK_DisableLDO30(void)
{
	 
	uint8_t u8Lock;
	
	u8Lock = SYS_Unlock();
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL = (((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL & (~(0x1ul << (3)))) | (0x1ul << (3));
	SYS_Lock(u8Lock);
}





 
uint32_t CLK_GetHCLKFreq(void)
{
	 
	SystemCoreClockUpdate();
	return SystemCoreClock;
}










 
void CLK_SetPLL2(uint32_t u32PllClkSrc, uint32_t u32PllFreq)
{
	 
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PLLCON = (((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PLLCON & (~(0x1ul << (2)))) | u32PllClkSrc;
}




 
uint32_t CLK_GetPLL2ClockFreq(void)
{
	 
	return 48000000;
}








 
void CLK_EnableXtalRC(uint32_t u32ClkMask)
{
	 
	uint8_t u8Lock;
	
	u8Lock = SYS_Unlock();
    ((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL |= u32ClkMask;
	SYS_Lock(u8Lock);
}








 
void CLK_DisableXtalRC(uint32_t u32ClkMask)
{
	 
	uint8_t u8Lock;
	
	u8Lock = SYS_Unlock();
    ((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->PWRCTL &= ~u32ClkMask;
	SYS_Lock(u8Lock);
}












 
void CLK_SetHCLK(uint32_t u32ClkSrc, uint32_t u32ClkDiv)
{
	 
	uint8_t u8Lock;
	
	u8Lock = SYS_Unlock();
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->CLKSEL0 = (((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->CLKSEL0 & ~(0x7ul << (0))) | u32ClkSrc;
	((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->CLKDIV = (((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->CLKDIV & ~(0xful << (0))) | u32ClkDiv;
	SYS_Lock(u8Lock);
	
	SystemCoreClockUpdate();
}


















 
void CLK_EnableModuleClock(uint32_t u32ModuleIdx)
{
	 
	uint8_t u8Lock;
	
	u8Lock = SYS_Unlock();
	*(volatile uint32_t *)((uint32_t)&((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->AHBCLK+(((u32ModuleIdx >>31) & 0x1)*4))  |= 1<<((u32ModuleIdx >>0 ) & 0x1f);
	SYS_Lock(u8Lock);
}


















 
void CLK_DisableModuleClock(uint32_t u32ModuleIdx)
{
	 
	uint8_t u8Lock;
	
	u8Lock = SYS_Unlock();
	*(volatile uint32_t *)((uint32_t)&((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->AHBCLK+(((u32ModuleIdx >>31) & 0x1)*4))  &= ~(1<<((u32ModuleIdx >>0 ) & 0x1f));
	SYS_Lock(u8Lock);
}











































 
void CLK_SetModuleClock(uint32_t u32ModuleIdx, uint32_t u32ClkSrc, uint32_t u32ClkDiv)
{
	 
	uint32_t u32tmp=0,u32sel=0,u32div=0;
	uint8_t u8Lock;
	
	u8Lock = SYS_Unlock();
    
	if(((u32ModuleIdx >>10) & 0xfff)!=0x0)
	{
		u32div =(uint32_t)&((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->CLKDIV+((((u32ModuleIdx >>22) & 0x0))*4);
		u32tmp = *(volatile uint32_t *)(u32div);
		u32tmp = ( u32tmp & ~(((u32ModuleIdx >>10) & 0xfff)<<((u32ModuleIdx >>5 ) & 0x1f)) ) | u32ClkDiv;
		*(volatile uint32_t *)(u32div) = u32tmp;
    }
		
	if(((u32ModuleIdx >>27) & 0x7)!=0x0)
	{
		u32sel = (uint32_t)&((CLK_T *) ((( uint32_t)0x50000000) + 0x00200))->CLKSEL0+((((u32ModuleIdx >>30) & 0x1))*4);
		u32tmp = *(volatile uint32_t *)(u32sel);
		u32tmp = ( u32tmp & ~(((u32ModuleIdx >>27) & 0x7)<<((u32ModuleIdx >>22) & 0x1f)) ) | u32ClkSrc;
		*(volatile uint32_t *)(u32sel) = u32tmp;
	}
	
	SYS_Lock(u8Lock);
}


#line 644 "..\\..\\..\\..\\Library\\StdDriver\\src\\clk.c"

   

   

   

 
