;/******************************************************************************
; * @file     startup_N572.s
; * @version  V1.00
; * $Revision: 3 $
; * $Date: 14/07/17 11:28a $ 
; * @brief    CMSIS ARM Cortex-M0 Core Device Startup File
; *
; * @note
; * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
;*****************************************************************************/  

                IMPORT	WDT_IRQHandler			
                IMPORT	APU_IRQHandler			
                IMPORT	ADC_IRQHandler			
                IMPORT	EXINT_IRQHandler		
                IMPORT	USBD_IRQHandler			
                IMPORT	TMR0_IRQHandler			
                IMPORT	TMR1_IRQHandler			
                IMPORT	TMR2_IRQHandler			
                IMPORT	GPAB_IRQHandler			
                IMPORT	SPI0_IRQHandler			
                IMPORT	PWM0_IRQHandler			
                IMPORT	SPI1_IRQHandler			
                IMPORT	TMRF_IRQHandler			
                IMPORT	RTC_IRQHandler          
                IMPORT	PWRWU_IRQHandler        

; <h> Stack Configuration
;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>

Stack_Size      EQU     0x00000100

                AREA    STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem       SPACE   Stack_Size
__initial_sp


; <h> Heap Configuration
;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>

Heap_Size       EQU     0x00000000

                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem        SPACE   Heap_Size
__heap_limit


PRESERVE8
                THUMB


; Vector Table Mapped to Address 0 at Reset

                AREA    RESET, DATA, READONLY
                EXPORT  __Vectors

__Vectors       DCD     __initial_sp              ; Top of Stack
                DCD     Reset_Handler             ; Reset Handler
                DCD     NMI_Handler               ; NMI Handler
                DCD     HardFault_Handler         ; Hard Fault Handler
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     SVC_Handler               ; SVCall Handler
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     PendSV_Handler            ; PendSV Handler
                DCD     SysTick_Handler           ; SysTick Handler
; External Interrupts
												  ;	maximum	of 32 External Interrupts are possible
				DCD		WDT_IRQHandler	
				DCD		APU_IRQHandler	
				DCD		ADC_IRQHandler
				DCD		EXINT_IRQHandler
				DCD		USBD_IRQHandler 
				DCD		TMR0_IRQHandler
				DCD		TMR1_IRQHandler	
				DCD		TMR2_IRQHandler	
				DCD		GPAB_IRQHandler	
				DCD		SPI0_IRQHandler	
				DCD		PWM0_IRQHandler	
				DCD		SPI1_IRQHandler	
				DCD		TMRF_IRQHandler
				DCD		RTC_IRQHandler
				DCD		PWRWU_IRQHandler
				
                AREA    |.text|, CODE, READONLY



; Reset Handler

Reset_Handler   PROC
                EXPORT  Reset_Handler             [WEAK]
                IMPORT  __main
                LDR     R0, =__main
                BX      R0
                ENDP


; Dummy Exception Handlers (infinite loops which can be modified)                

NMI_Handler     PROC
                EXPORT  NMI_Handler               [WEAK]
                B       .
                ENDP
HardFault_Handler\
                PROC
                EXPORT  HardFault_Handler         [WEAK]
                B       .
                ENDP
SVC_Handler     PROC
                EXPORT  SVC_Handler               [WEAK]
                B       .
                ENDP
PendSV_Handler  PROC
                EXPORT  PendSV_Handler            [WEAK]
                B       .
                ENDP
SysTick_Handler PROC
                EXPORT  SysTick_Handler           [WEAK]
                B       .
                ENDP

                ALIGN


; User Initial Stack & Heap

                IF      :DEF:__MICROLIB
                
                EXPORT  __initial_sp
                EXPORT  __heap_base
                EXPORT  __heap_limit
                
                ELSE
                
                IMPORT  __use_two_region_memory
                EXPORT  __user_initial_stackheap
__user_initial_stackheap

                LDR     R0, =  Heap_Mem
                LDR     R1, =(Stack_Mem + Stack_Size)
                LDR     R2, = (Heap_Mem +  Heap_Size)
                LDR     R3, = Stack_Mem
                BX      LR

                ALIGN

                ENDIF
				
				
			    END

;/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/